Increasing on-chip variations (OCV) causes a break down of the traditional synchronous design approach. As design complexity increases, it becomes harder to uphold system level synchronization due to unpredictable clock skew. Excessive timing margins are required to ensure setup as well as hold times, and take an increasing portion of an already pressed clock cycle.
The FloorDirector maintains a fully synchronous system perspective, while making use of a globally coupled clock distribution technique which counteracts variability effects at the system level. Hence scalable, variability robust system level clocking is enabled, where local skew is bounded irrespective of system size.
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