FloorDirector™ is a clock- and floorplanning tool which enables ASIC designers to reduce IR drop and noise in system-on-chip designs by flattening dynamic power peaks through automated floorplanning and clock scheduling techniques.
The tool combines a full timing engine and advanced dynamic power analysis into a fully automated optimization engine which performs system-level power shaping to reduce critical power peaks.
Optimization from fixed, predefined floorplans are also possible by advanced power shaping capabilities.